As AI technologies—particularly generative AI—rapidly reshape society, their growing energy demands pose a critical challenge. In the circuits and systems (CAS) field, much effort has been devoted to designing high-performance and low-power electronic systems, yet their energy use after deployment often receives little attention. This talk introduces how core expertise in the CAS community, such as modeling, optimization, and implementation, can be extended beyond semiconductors to cyber-physical systems (CPS) for reducing energy demand in society. A case study on HVAC (Heating, Ventilation, and Air Conditioning) systems in buildings, which account for nearly 40% of building energy use, illustrates this approach. The work spans from system modeling to real-world deployment and validation. The experience highlights the potential of CAS thinking to address energy challenges and contribute to sustainable, real-world solutions.
Ittetsu Taniguchi received B.E., M.E., and Ph.D. degrees from Osaka University in 2004, 2006, and 2009, respectively. From 2007 to 2008, he was an international scholar at Katholieke Universiteit Leuven (IMEC), Belgium. In 2009, he joined the College of Science and Engineering, Ritsumeikan University as an assistant professor, and became a lecturer in 2014. In 2017, he joined the Graduate School of Information Science and Technology, Osaka University (renamed The University of Osaka in April 2025) as an associate professor. His research interests include system-level design methodology of embedded systems and cyber-physical systems. He is a member of IEEE, ACM, IEICE, and IPSJ.
In this talk, I will start by introducing the recent revolution of intelligent image processing. Then, I will go through the accompanied evolution of deep learning models, from regression-based to diffusion-based approaches, and highlight the corresponding design challenges for hardware accelerators. Finally, I will present three of our recent accelerator chips as case studies demonstrating how high-performance inference can be achieved for high-quality regression-based models: STEP [ISSCC’25] for 8K-UHD spatial-temporal super-resolution, Cattus [VLSIC’25] for 4K-UHD multi-function image processing, and EDA [ISSCC’25] for HD-resolution small-object detection.
Chao-Tsung Huang received the PhD degree in electronics engineering from National Taiwan University in 2005. He is now with National Tsing Hua University (NTHU) as a Professor. His research interests mainly focus on digital IC design and computing architecture for computer vison applications. He has published several research papers in related fields: ISSCC/VLSIC/JSSC (solid-state circuits), ISCA/MICRO (computer architecture), and CVPR/ICCV/TPAMI (computer vision). He now serves as Associate Editor for IEEE OJCAS.
In this talk, I will introduce a reduced ROM-based architecture that integrates the concepts of domain folding and angle recoding for the implementation of the COordinate Rotation DIgital Computer (CORDIC) algorithm. Domain folding restricts the evaluation of sine and cosine functions to the interval [0, π/8], instead of the conventional [0, 2π]. Using trigonometric addition identities, the sine and cosine values within the interval [0, π/4] are mapped based on those restricted to [0, π/8]. The quarter-wave symmetry property is then applied to extend the mapping to the full domain [0, 2π]. Applying angle recoding within the interval [0, π/8] provides two key advantages. First, it reduces the size of the ROM lookup table by approximately 50%. Second, it yields a one-bit improvement in precision for the CORDIC implementation.
Chuen-Yau Chen received the B.S. and Ph.D. degrees in electrical engineering from National Cheng Kung University (NCKU), Tainan, Taiwan, in 1995 and 2001, respectively. He is currently a professor in the Department of Electrical Engineering at the National University of Kaohsiung (NUK), Taiwan. His research interests include analog current-mode and digital IC design with applications in fuzzy logic control systems, blind signal processing systems, and computational arithmetic.
He served as Chair of the IEEE Circuits and Systems Society Tainan Chapter from 2021 to 2022. He is currently the Vice Chair of the IEEE Tainan Section, a member of the 2025 IEEE Region 10 Awards & Recognition Committee (ARC), and a member of the IEEE APCCAS 2027 Steering Committee. Since 2022, he has also served as Dean of the College of Engineering at NUK.